• Gas detectors
• IXPE
• X-ray spectroscopy

The focus of my master thesis is the design and characterization of custom, large-area CMOS ASICs to be used coupled to suitable active media as charge-collecting anodes of X-ray detectors. The fundamental common characteristic of this family of readout chips is the event-driven readout approach: each single X-ray interaction is captured and immediately processed, on an event-by-event basis. This is achieved by some specific logics, implemented on chip, capable of locating and serially reading a small subregion of the pixel grid interested by the event. While this approach is beneficial in several key areas, most notably for the mitigation of the pile-up effect because indeed reading the signal when triggers prevents the possibility of superpositions with other events, it comes with specific challenges, first and foremost the difficulty in achieving high data throughputs. The IXPE polarimetry-sensitive Gas Pixel Detectors (GPDs) successfully use this event-driven approach for their data readout, being most of the sources throughput more than manageable for the electronics.

One of the lines of research followed in this work consists in the monitoring of the GPDs performances on long-time scales, in particular under the action of an asymptotic pressure decrease of the 10--20\% inside the sealed detectors gas cells, indirectly observed through detector response variations. In IXPE detectors, this issue was not expected and so there wasn't the possibility of fixing the problem or to set up a direct monitoring of the gas pressure before the launch, therefore those variations inside GPDs are indirectly measured using three proxies: the gain, the quantum efficiency and the average track length. The principal metrics of IXPE, quantum efficiency and modulation factor depend on gas pressure, it is then necessary to correct the data results for the response variation caused by the phenomenon. The cause of the pressure reduction is to be ascribed to the absorption of the active gas dimethyl-ether by the epoxy glue used for bonding the components of the GPDs. We have performed measurements of gas absorption with different sets of absorbing epoxy samples inside a sealed gas chamber searching for a suitable model for the phenomenon, successively used as correcting factor inside control GPDs' data sampled. The measurements were performed inside a dedicated custom Bake-and-Fill System (BFS) built for the detectors' assembly and testing, that contains also a sealable gas chamber equipped with pressure and temperature sensors.

A new generation of ASICs successive to the launch of IXPE is nowadays under testing and characterization. This family of readout chips was initially thought for the next generation of X-ray polarimeters, requiring a faster readout for the sustainment of higher rates of input data. Currently it has achieved lower dead time of an order of magnitude with respect to the first generation, from 1 ms to 100 $\mu$s and providing the same performances in terms of polarimetry, imaging and spectroscopy.

On a different line of research, we are working on the idea of coupling the actual generation of ASICs to a solid-state sensor instead of a gaseous one, in order to realize a detector capable of simultaneous high-resolution spectroscopy and imaging. This kind of detector would target, in addition to space X-ray detection as its antecedents, different applications, such as material characterization for industrial purposes, a task that requires an higher speed of reading of a factor 10--100, so dictating the need for a new generation of chips that would implement hardware an high level of readout parallelisation: it would be divided into independent unit areas, allowing to read simultaneously from different locations of the pixel grid and, inside every independent unit, the pixel grid channels would be realized in order to parallelize the readout of every single event.
We have simulated the behaviour of the aforementioned solid-state detector estimating the performances of both the actual generation and the incoming generation of ASICs. For the latter, together with the new hardware configuration, we have simulated several readout methods and reconstruction algorithms, implementing an end-to-end readout chain that will lead the project of realization of the new ASIC.