ETD

Archivio digitale delle tesi discusse presso l’Università di Pisa

Tesi etd-09032017-151626

Tipo di tesi

Tesi di laurea magistrale

URN

etd-09032017-151626

Titolo

Hardware-in-the-loop implementation of a SpaceFibre Link Analyzer in Omnet++ environment for a Network Level Device testing.

Dipartimento

INGEGNERIA DELL'INFORMAZIONE

Corso di studi

COMPUTER ENGINEERING

Parole chiave

Device Testing
Hardware in the loop
Networks Simulation
Omentpp
SpaceFibre

Data inizio appello

03/10/2017

Consultabilità

Non consultabile

Data di rilascio

03/10/2087

Riassunto (Inglese)

Riassunto (Italiano)

The OMNeT++ space network simulator provides supporting for commercial products which use SpaceWire/SpaceFibre technology. This technology is widely used for spaceflight applications. The thesis concerned the integration and testing of a new SpaceFibreSpaceWire simulated node able to configure and exchange data with the already existing SpaceFibre/SpaceWire Link Analyzer (LA) developed by IngeniArs using a Hardware-inthe-loop (HIL) architecture. The underlying network technology used to interconnect the simulator with the LA is Ethernet.

File

Nome file	Dimensione
Tesi non consultabile. Contatta l’autore