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Archivio digitale delle tesi discusse presso l’Università di Pisa

Tesi etd-07042024-234642


Tipo di tesi
Tesi di laurea magistrale
Autore
BIONDI, MATTEO
URN
etd-07042024-234642
Titolo
Enhancing Soft-GPU Robustness Against SEUs: Architectural Modeling And Class-Based Fault Mitigation Techniques With Reliability And Performance Impact Analysis
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
COMPUTER ENGINEERING
Relatori
relatore Prof. Fanucci, Luca
relatore Prof.ssa Bernardeschi, Cinzia
relatore Ing. Monopoli, Matteo
Parole chiave
  • fault injection
  • fault mitigation techniques
  • fpga
  • Möbius
  • radiation
  • reliability
  • single event upset
  • soft gpu
  • space
Data inizio appello
26/07/2024
Consultabilità
Non consultabile
Data di rilascio
26/07/2094
Riassunto
Satellites' computing platforms operating in the space environment are vulnerable to radiation-induced faults (e.g. Single Event Upsets - SEUs). These faults can lead to system failures, with the risk of compromising the mission reliability requirements. Fault mitigation techniques are crucial to ensure the functionality and reliability of computing platforms in space. This research investigates such techniques applied to a Soft GPU IP implemented on a radiation-tolerant Field Programmable Gate Array (FPGA). This thesis proposes a novel approach to initially estimate the reliability of a digital design system against SEUs using Fault Tree models in a high-level modelling tool called Möbius. Subsequently, a new class-based methodology is proposed to attribute fault mitigation techniques to the submodules of interest in the architecture. The components classification phase involves the analysis of the criticality, power, and area impact for the most important design parts of the GPU when implemented in hardware. The impact in terms of maximum clock frequency, power, and area consumption is analyzed on the new architecture. The increase in reliability is evaluated through faults injection on the essential bits of the configuration memory, finding a notable improvement compared to the starting architecture. In the end, a new tool that allows the injection of faults into post-synthesis netlists in a vendor-independent manner is presented.
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