logo SBA

ETD

Archivio digitale delle tesi discusse presso l’Università di Pisa

Tesi etd-06242005-141306


Tipo di tesi
Tesi di laurea specialistica
Autore
De Filippis, Stefano
Indirizzo email
stefano.defilippis@gmail.com
URN
etd-06242005-141306
Titolo
Low-Power Low-Voltage ADC for ZigBee Applications
Dipartimento
INGEGNERIA
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Iannaccone, Giuseppe
Parole chiave
  • ADC
  • bassa potenza
  • ZigBee
Data inizio appello
12/07/2005
Consultabilità
Non consultabile
Data di rilascio
12/07/2045
Riassunto
The purpose of this work is to carry out a Analog-Digital Converter to be integrated on a transceiver chip for ZigBee standard. For the integration in a transceiver the most important characteristic is a low supply voltage and a low power consumption. These two characteristics can be reached using a CMOS technolgy with a low threshold voltage and an architecture that allows to decrease the dissipated power.
The architecture that has been chosen is the Folding and Interpolating architecture and the technology used is a 90 nm CMOS technology with low threshold voltage. The idea of this work came out from the partnership be- tween the Department of Information Engineering of the University of Pisa (Italy) and the Department of Technical Electronics of the Technical University of Munich (Germany).
File