Tipo di tesi
Tesi di laurea specialistica
Titolo
Design and verification of the FPGA-based digital front-end for the SLSTR instrument
Corso di studi
INGEGNERIA ELETTRONICA
Parole chiave
- digitale
- Actel
- Altera
- design
- digital
- FPGA
- front-end
- progettazione
- SLSTR
- verifica
- verification
- VHDL
Data inizio appello
25/06/2010
Consultabilità
Non consultabile
Data di rilascio
25/06/2050
Riassunto (Italiano)
This thesis describes the architecture design, system verification and implementation phases on different FPGA technologies of a digital front-end electronics. The circuit is used to drive the analog channels of some optical detectors in order to acquire science data and transmit them using the SpaceWire standard for serial high-speed communications and networking. It will have to operate in a high-radiation environment, therefore its physical implementation requires the employment of radiation-tolerant technologies.
