Tesi etd-03062025-173848 |
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Tipo di tesi
Tesi di laurea magistrale
Autore
DUCCI, GABRIELE
URN
etd-03062025-173848
Titolo
ADS Modeling of 802.11ba Wake-Up Radio Receiver
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Prof. Saponara, Sergio
relatore Ing. Ronchi, Marco
relatore Ing. Paoli, Vittoria
relatore Ing. Ronchi, Marco
relatore Ing. Paoli, Vittoria
Parole chiave
- ADC
- ADS
- AGC
- Front End
- Modeling
- Radio Frequency
- RF
- VGA
- Wake-Up Radio
Data inizio appello
14/04/2025
Consultabilità
Non consultabile
Data di rilascio
14/04/2095
Riassunto
The study and simulation of the proposed WUR (Wake-Up Radio) receiver were conducted by creating a system model in the Advanced Design System (ADS) simulation environment. This approach enables the comparison of different architectures and the evaluation of the effects of varying system parameters, offering a faster design time compared to transistor-level simulations and a higher level of detail compared to high-level tools like MATLAB/Simulink. The MATLAB development environment was used only to get an initial idea of how the blocks that model the various components of the WUR should function and to extract the very important parameters and fundamental functions for modeling on ADS.
Blocks of the receiver of the Wake-Up Radio have been analyzed and simulated on ADS. Since the receiver chain from antenna to downconversion mixer has been already modelled and simulated in ADS in a previous Master thesis, this work is focused on the baseband blocks. The first is the VGA (Variable Gain Amplifier), whose gain varies continuously to maintain constant output power. A Look-Up Table (LUT) extrapolated from a Cadence design in 18nm technology was imported into MATLAB containing, for each of the eight gains, the output voltages corresponding to input voltages (Vin) within a range of +0.7V to -0.7V, with a step of 1mV between two consecutive Vin values. Based on this LUT, a polynomial approximation of each of the eight characteristics was calculated, with accuracy varying depending on the Total Harmonic Distortion (THD) imposed by the user. Then, the ADC (Analog to Digital Converter) continuously samples the incoming analog signal, converting it into a stream of digital data which will decide whether to wake up the main system or not.
The AGC (Adaptive Gain Control) must regulate the gain to ensure that the output power is constant. To do this, it controls the output power value in a moving time window: within this window, an average of some temporally equidistant output power values is taken, and depending on the average value within this time window, the gain is increased or decreased according to a precise criterion. Moreover, a spin-off on Quadrature Amplitude Modulation (QAM) modulation was carried out: by inputting an ideal QAM constellation into the VGA, the output constellation from the VGA was observed to see how it varied, to understand if it was actually amplified and how much it was distorted, compared to the ideal input constellation. The ADS VGA model introduces distortions, which are expected to be small if the RMS value of the input QAM constellation makes the VGA operate in the linear region. Then the same simulation was performed considering the input constellation to the VGA no longer ideal but noisy. In MATLAB, it was also possible to calculate the maximum RMS value of the input QAM constellation to ensure that the percentage EVM does not exceed a certain value (for example, 1%).
The goal is to achieve correspondence with what was seen at a transistor level on Cadence, but with shorter simulations and with schematics composed of equivalent functional blocks.
Blocks of the receiver of the Wake-Up Radio have been analyzed and simulated on ADS. Since the receiver chain from antenna to downconversion mixer has been already modelled and simulated in ADS in a previous Master thesis, this work is focused on the baseband blocks. The first is the VGA (Variable Gain Amplifier), whose gain varies continuously to maintain constant output power. A Look-Up Table (LUT) extrapolated from a Cadence design in 18nm technology was imported into MATLAB containing, for each of the eight gains, the output voltages corresponding to input voltages (Vin) within a range of +0.7V to -0.7V, with a step of 1mV between two consecutive Vin values. Based on this LUT, a polynomial approximation of each of the eight characteristics was calculated, with accuracy varying depending on the Total Harmonic Distortion (THD) imposed by the user. Then, the ADC (Analog to Digital Converter) continuously samples the incoming analog signal, converting it into a stream of digital data which will decide whether to wake up the main system or not.
The AGC (Adaptive Gain Control) must regulate the gain to ensure that the output power is constant. To do this, it controls the output power value in a moving time window: within this window, an average of some temporally equidistant output power values is taken, and depending on the average value within this time window, the gain is increased or decreased according to a precise criterion. Moreover, a spin-off on Quadrature Amplitude Modulation (QAM) modulation was carried out: by inputting an ideal QAM constellation into the VGA, the output constellation from the VGA was observed to see how it varied, to understand if it was actually amplified and how much it was distorted, compared to the ideal input constellation. The ADS VGA model introduces distortions, which are expected to be small if the RMS value of the input QAM constellation makes the VGA operate in the linear region. Then the same simulation was performed considering the input constellation to the VGA no longer ideal but noisy. In MATLAB, it was also possible to calculate the maximum RMS value of the input QAM constellation to ensure that the percentage EVM does not exceed a certain value (for example, 1%).
The goal is to achieve correspondence with what was seen at a transistor level on Cadence, but with shorter simulations and with schematics composed of equivalent functional blocks.
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