Tesi etd-01182016-012449 |
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Tipo di tesi
Tesi di laurea magistrale
Autore
BENVENUTI, MARTINA
URN
etd-01182016-012449
Titolo
System-level design tool for switched capacitor DC-DC energy scavenging converters
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Prof. Iannaccone, Giuseppe
relatore Prof. Bruschi, Paolo
tutor Ing. Dalena, Francesco
relatore Prof. Bruschi, Paolo
tutor Ing. Dalena, Francesco
Parole chiave
- dc-dc converters
- design tool
- energy harvesting
- high efficiency
- low voltage
- nano-power
- switched capacitor converters
Data inizio appello
26/02/2016
Consultabilità
Completa
Riassunto
This thesis deals with the system modelling and design of a Switched Capac-
itor DC-DC (SC DC-DC) nano-power converter in Complementary Metal Oxide
Semiconductor (CMOS) technology for energy harvesting applications.
First of all, after a critical evaluation on the whole Integrated Circuit (IC)
system structure, a Python script has been created in order to accurately analyse
any system analytical behaviours before instantiating and running the Cadence
usual simulations.
The code is an upgrade with respect to a pre-existing one ([1]): several com-
parisons are listed and explained to show the differences between the two, as well
as stressing on our new dedicated features.
In order to validate the model on the code, then, a feasibility study has been
performed with a 180 nm United Microelectronics Corporation (UMC) technol-
ogy process in the Cadence Virtuoso design suite. Good results let us state its
reliability in being used both for the most of SC DC-DC architectures pre-design
analysis and post-design verification: a full design space exploration shows how
to use the script.
Finally, the SC DC-DC circuit D for bluetooth applications that we present
uses the Taiwan Semiconductor Manufacturing Company (TSMC) 55 nm technol-
ogy process and its design has been mostly realized by Luca Intaschi, during his
PhD, and Francesco Dalena from Dialog Semiconductor in Livorno. The circuit
D converter is meant to be part of a sensor node (that needs to survive in total
absence of battery recharge) supplied by a Thermo Electric Generator (TEG)
which guarantees a very low input voltage to the system of about 0.2 -
itor DC-DC (SC DC-DC) nano-power converter in Complementary Metal Oxide
Semiconductor (CMOS) technology for energy harvesting applications.
First of all, after a critical evaluation on the whole Integrated Circuit (IC)
system structure, a Python script has been created in order to accurately analyse
any system analytical behaviours before instantiating and running the Cadence
usual simulations.
The code is an upgrade with respect to a pre-existing one ([1]): several com-
parisons are listed and explained to show the differences between the two, as well
as stressing on our new dedicated features.
In order to validate the model on the code, then, a feasibility study has been
performed with a 180 nm United Microelectronics Corporation (UMC) technol-
ogy process in the Cadence Virtuoso design suite. Good results let us state its
reliability in being used both for the most of SC DC-DC architectures pre-design
analysis and post-design verification: a full design space exploration shows how
to use the script.
Finally, the SC DC-DC circuit D for bluetooth applications that we present
uses the Taiwan Semiconductor Manufacturing Company (TSMC) 55 nm technol-
ogy process and its design has been mostly realized by Luca Intaschi, during his
PhD, and Francesco Dalena from Dialog Semiconductor in Livorno. The circuit
D converter is meant to be part of a sensor node (that needs to survive in total
absence of battery recharge) supplied by a Thermo Electric Generator (TEG)
which guarantees a very low input voltage to the system of about 0.2 -
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