Digital archive of theses discussed at the University of Pisa


Thesis etd-02132019-111752

Thesis type
Tesi di dottorato di ricerca
Thesis title
Harnessing Parallelism in Multi/Many-Cores with Streams and Parallel Patterns
Academic discipline
Course of study
tutor Prof. Danelutto, Marco
  • parallel programming
  • many-cores
  • multi-cores
  • algorithmic skeletons
  • parallel building blocks
  • parallel patterns
Graduation session start date
Multi-core computing systems are becoming increasingly parallel and heterogeneous. Parallelism exploitation is today the primary instrument for improving application performance.
Despite the impressive evolution of parallel HW, parallel software development tools have not yet reached the same level of maturity.

Programmers need high-level parallel programming models capable from the one hand of reducing the burdens of the efficient parallelization of their applications, and from the other side of accommodating hardware heterogeneity. Abstracting parallel programming by employing parallel design patterns has received renovated attention over the last decade. However, the pattern-based approach to parallelism exploitation suffers from limited flexibility and extensibility.

In this thesis, we present the new version of the FastFlow parallel library that completes and strengthens the library that we started developing since 2010.
Over the years the FastFlow pattern-based library was used in three EU-funded research projects. The lessons learned over this period of research and parallel software development convinced us to redesign, restructure and improve the lower level software layers of the library and also to introduce a new concurrency graph transformation component aiming at refactoring the parallel structure obtained through pattern compositions. The objectives of the new FastFlow design are twofold: a) to increase flexibility and composability of the approach while preserving its efficiency, and b) to introduce new features that open to the possibility of introducing static optimizations.

We propose a small set of highly efficient, customizable and composable parallel building blocks that can be connected and nested in many different ways and that provides the user with a reduced set of powerful parallel components. The base idea mimics the RISC approach of microprocessor architectures.
The FastFlow library targets domain-expert programmers by offering some well-know high-level parallel patterns as well as run-time system programmers by providing the set of parallel building blocks along with clean and effective data-flow composition rules.

The new FastFlow software layer provides the essential mechanisms to restructure the data-flow concurrency graph produced by patterns and building blocks compositions. Straightforward yet effective graph transformations are transparently and automatically provided to the user through optimization flags. Its clean API enables the implementation of new and more powerful static optimization policies.

Finally, a full set of experiments is discussed assessing both functional and non-functional properties of both the building block set and the transformation rules.