ETD

Archivio digitale delle tesi discusse presso l'Università di Pisa

Tesi etd-11112005-183716


Tipo di tesi
Tesi di laurea specialistica
Autore
Bacioccola, Andrea
Indirizzo email
andreabacioccola@hotmail.com
URN
etd-11112005-183716
Titolo
Performance evaluation of the wireless standard IEEE 802.16 with error on channel
Dipartimento
INGEGNERIA
Corso di studi
INGEGNERIA INFORMATICA
Relatori
relatore Prof. Mingozzi, Enzo
relatore Eklund, Carl
relatore Prof. Lenzini, Luciano
Parole chiave
  • qos
  • scheduling
  • duplex
  • half
  • hd
  • fdd
  • wimax
  • 802.16
  • IEEE
Data inizio appello
01/12/2005
Consultabilità
Non consultabile
Data di rilascio
01/12/2045
Riassunto
An 802.16 network consists of a number of Subscriber Stations (SSs) served by a Base Station(BS), which centrally controls the access to the wireless medium on a time frame basis. In the downlink direction the BS broadcasts to all SSs. Instead, in the uplink direction, SS transmissions are coordinated by the BS, by means of a timetable which is periodically advertised at the beginning of each frame. This centralized Medium Access Control (MAC) allows sophisticated schedul-ing algorithms to be implemented at the BS in order to provide user data traffic with QoS guarantees.
Two main duplexing techniques can be used in the IEEE 802.16 system to share the air physical channel: Time Division Duplex (TDD) and Frequency Division Duplex (FDD). In a TDD system, the uplink and downlink transmissions occur at different times and usually share the same frequency. In an FDD system, the uplink and downlink channels are located on separate frequencies and occur at the same time. There is a notable savings in power from the TDD architecture which is a direct result of turning the receiver off while in transmission mode and vice versa. However, a disadvantage exists. There is a reduction of the global capacity since there can be no transmission of data while in receive mode unlike FDD systems. In essence, the system must handle fewer users in a given area than in FDD systems.
On the other hand, an SS can have either full-duplex or half-duplex transmission capabilities. A fullduplex SS (FD-SS) can simultaneously listen to the downlink channel while transmitting uplink data, whereas a half-duplex SS (HD-SS) cannot receive while transmitting, i.e., uplink and downlink transmissions from/to an HD-SS cannot overlap in time.
By introducing the half-duplex terminals, IEEE 802.16 combines the benefits of the TDD systems while still trying to allow for frequency duplexing.
The challenge in 802.16 networks operating in FDD mode with Half Duplex (HD)-SSs is therefore two-fold. On the one hand, the BS is required to provide all SSs with the negotiated level of QoS, in terms of, for instance, reserved bandwidth or bounded delay. On the other hand, in doing so the BS
is required to schedule the HD-SSs so as to take into account the half-duplex constraint. As a matter of fact, no specific function is defined in the standard in order to meet both the above mentioned requirements, since space is left to manufacturers to compete with proprietary solutions.

In this document, we propose an algorithm, namely, the Half-Duplex Scheduling Algorithm (HDSA), to be implemented at the BS in order to schedule transmissions to and from different SSs. Specifically; we derive necessary and sufficient conditions for a set of transmissions to be schedulable under the half-duplex constraint. We also prove that HDSA is optimal, in the sense that, if a set is schedulable, then the algorithm is able to find a suitable schedule with O(n) complexity, where n is the size of the set of transmissions to be scheduled. Although HDSA is presented in the context of 802.16 networks, it is nevertheless sufficiently general to be applied to any centralized MAC with half-duplex terminals and concurrent bidirectional transmissions.
We also propose a BS packet scheduling algorithm and a SS packet scheduling algorithm. The packet scheduler on the BS is the Deficit Round Robin (DRR) [12] while the packet scheduler on the SSs is the Weighted Round Robin in its basic version [12]. WRR and DRR are a widely used packet scheduling algorithms that supports QoS. Specifically, we propose a modified version of the DRR and the WRR schedulers to support optional ARQ mechanism [1] and we define data structures and algorithms needed to the ARQ mechanism.
The effectiveness of HDSA and packet schedulers in a scenario with realistic traffic is then confirmed via a simulation analysis.
The simulations were carried out by means of an event-driven ad-hoc simulator of the 802.16 MAC protocol written in C++.
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