• FPGA
• LHCb
• luminosity
• real-time

For the LHC Run-3, just started in July 2022, the LHCb experiment has adopted for the first time a trigger system based on the complete reconstruction of all collision events.
The real-time reconstruction of complex events arriving with an average rate of 30 MHz is a very significant computational challenge, which the collaboration has decided to tackle with a heterogeneous computing system, in which CPU, GPU and FPGA cards are employed at the same time.
Many R&D projects were established to increase the computing power of the experiment by realizing specialized computing solutions to carry out the most repetitive and low-level reconstruction steps in the most effective way.
One of these projects concerns the implementation on FPGA of a real-time bi-dimensional cluster reconstruction algorithm, realized on the readout boards of the VELO, the pixel detector of LHCb, and has already provided significant savings of computing resources.
However, the real-time accessibility of all hits on a complex detector such as the VELO also allows to probe the further potential offered by FPGA reconstruction in real time.
The goal of this thesis work is to explore the feasibility of some of such new opportunities.
This thesis describes the implementation of a FPGA-based system for real-time luminosity measurement and monitoring of the beams at the LHCb interaction point, transparently embedded within the readout cards of the detector.
Additional functionalities for monitoring the operational status of the VELO sensors are also discussed, addressing spillover effects and sensors detection efficiency.
The results and performances of these realizations are reported, calibrated and measured through detailed simulations, and validated through tests in the actual LHCb experimental setup and in data taking conditions.