Tesi etd-09202019-124436 |
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Tipo di tesi
Tesi di laurea magistrale
Autore
DI DOMENICO, LUCA
Indirizzo email
ddl93@hotmail.it
URN
etd-09202019-124436
Titolo
Analysis design and implementation of an integrated optical modulator driver for Rad-Hard applications.
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Prof. Saponara, Sergio
relatore Dott. Palla, Fabrizio
relatore Dott. Palla, Fabrizio
Parole chiave
- CERN
- high-frequency
- integrated driver
- MZM driver
- optical modulator driver
- Rad-Hard
- radiation hardness
Data inizio appello
14/10/2019
Consultabilità
Tesi non consultabile
Riassunto
The aim of this work is to present the analysis, design, and implementation of an integrated optical modulator’s driver able to sustain the high radiation dose levels present in the inner layer of the CERN’s Large Hadron Collider experimental chamber. The driver, designed with TSMC65 nm CMOS technology, is conceived to face up to 800 Mrad Total Ionizing Dose,
sustaining up to 12 Gbps bit-rate link.
The analysis and the design of two different drivers, distinguished by different transistors models but united by the same Current Mode Logic architecture, will be presented in this thesis. The pre-layout performance of both in terms of bandwidth, output differential voltage swing, and radiation-hardness will be evaluated, leading to the optimal choice for the layout implementation. The adoption of radiation-hardening by design techniques such as avoiding the use of P-MOSFET transistors and increasing the minimum channel length for the integrated devices, combined with a new current generation system for the various stages of the integrated driver and a shunt-peaking technique to enlarge the bandwidth, ensure high robustness and reliability in an extreme radiation dose environment at high-frequencies. The post-layout results estimate, at 800 Mrad, a 28% amplitude reduction of the output signal eye diagram. Finally, from the Single Event Transient simulations, the circuit proves to be perfectly capable of supporting the impact of heavy ions up to a frequency limit of about 14 Gbps. In conclusion, the integrated circuit proves to be able to replace the currently employed CERN’s driver RD53A, allowing to have a throughput 9 times higher and total sustainable doses almost doubled than the current version.
sustaining up to 12 Gbps bit-rate link.
The analysis and the design of two different drivers, distinguished by different transistors models but united by the same Current Mode Logic architecture, will be presented in this thesis. The pre-layout performance of both in terms of bandwidth, output differential voltage swing, and radiation-hardness will be evaluated, leading to the optimal choice for the layout implementation. The adoption of radiation-hardening by design techniques such as avoiding the use of P-MOSFET transistors and increasing the minimum channel length for the integrated devices, combined with a new current generation system for the various stages of the integrated driver and a shunt-peaking technique to enlarge the bandwidth, ensure high robustness and reliability in an extreme radiation dose environment at high-frequencies. The post-layout results estimate, at 800 Mrad, a 28% amplitude reduction of the output signal eye diagram. Finally, from the Single Event Transient simulations, the circuit proves to be perfectly capable of supporting the impact of heavy ions up to a frequency limit of about 14 Gbps. In conclusion, the integrated circuit proves to be able to replace the currently employed CERN’s driver RD53A, allowing to have a throughput 9 times higher and total sustainable doses almost doubled than the current version.
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