• asynchronous
• delay lines
• digital design
• Matlab-Simulink
• Petri Net
• RISC microprocessor
• sensor applications
• Speed Independence

Asynchronous digital logic can show significant advantages in terms of power consumption and speed with respect to the synchronous one. Starting from the state of the art in asynchronous digital logic design and the STMicroelectronics flow for asynchronous finite state machines, a prototype of asynchronous RISC microprocessor oriented to sensors applications has been developed. The proposed architecture has been widely tested and optimized both at high-level, using the Matlab-Simulink environment, and at low-level, with the aid of digital and analog simulators. The obtained design is expected to have an energy consumption per elaboration comparable to its synchronous functionally-equivalent counterpart, but with a speed of operation up to 4x higher. The realization of a test-chip will soon allow to validate these estimates.