Tesi etd-09042018-101822 |
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Tipo di tesi
Tesi di laurea magistrale
Autore
POSSEMATO, ANDREA
URN
etd-09042018-101822
Titolo
Design, simulation and FPGA-prototyping of an high resolution CORDIC-based wheel speed sensor for autonomous driving and autonomous parking applications.
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Fanucci, Luca
tutor Monterastelli, Andrea
tutor Monterastelli, Andrea
Parole chiave
- autonomous parking
- autonomous driving
- wheel speed sensor
- CORDIC
- design
- simulation
- FPGA
- prototyping
Data inizio appello
28/09/2018
Consultabilità
Non consultabile
Data di rilascio
28/09/2088
Riassunto
The goal of this Master Thesis is the development of a FPGA-based (”Field Programmable Gate Array”) prototype for the feasibility study of the next generation wheel speed sensor for autonomous parking and autonomous driving applications.
The work is starting from VHDL code of an existing wheel speed sensor. Starting from this VHDL code, new IPs are developed and tested via simulation to reach the desired functionality. Finally the design is transferred on a FPGA. Some architectures and algorithms are developed in order to allow high resolution speed sensing for next generation wheel speed sensors.
The work is starting from VHDL code of an existing wheel speed sensor. Starting from this VHDL code, new IPs are developed and tested via simulation to reach the desired functionality. Finally the design is transferred on a FPGA. Some architectures and algorithms are developed in order to allow high resolution speed sensing for next generation wheel speed sensors.
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