ETD

Archivio digitale delle tesi discusse presso l'Università di Pisa

Tesi etd-07312017-101804


Tipo di tesi
Tesi di laurea magistrale
Autore
DIANA, LORENZO
URN
etd-07312017-101804
Titolo
Study and development of a SW driver for embedded OS in automotive data security applications: the Hardware Secure Module case study
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
COMPUTER ENGINEERING
Relatori
relatore Prof. Fanucci, Luca
relatore Dott. Carnevale, Berardino
Parole chiave
  • Hardware Secure Module
  • embedded OS
  • driver
  • automotive security
Data inizio appello
03/10/2017
Consultabilità
Non consultabile
Data di rilascio
03/10/2087
Riassunto
Nowadays there is an ever-growing number of electronic devices embedded in cars, from those related to safety (e.g. ABS) to others concerning entertainment (smart-phone connections) or vehicle optional feature (e.g. GPS). This new scenario can lead to security issues: to address these problems Hardware Security Module (HSM) was developed. A HSM is a device that constitutes a secure environment where it is possible to perform cryptographic operations in an efficient way; one example of HSM for the automotive environment is the Secure Hardware Extension (SHE). It constitutes a valid solution for current automotive security needs, featuring a secure zone where to store cryptographic parameters and perform isolated and efficient security operations. In the automotive field there are strict requirements about latency and throughput, consider for instance air-bag or other safety related systems, and therefore any automotive HSM has to satisfy these requirements in order to be suitable for this kind of vehicle. Therefore, one of the main latency requirements of the SHE specifications is that any function shall be executed within 2 micro second.
This work has focused on the implementation of a high-speed reliable interface for the interconnection between a device supporting SHE standard and the surrounding environment (such as a CPU) through extension of the hardware bus interface and development of the relative software drivers.
The hardware bus used is the Advanced eXtensible Interface (AXI), available in high and low performance versions. The former (AXI4-Lite) is simple to use and has a low resource footprint while the latter (AXI4-Full) provides a high throughput at the expense of a higher usage of logical resources. In order to find the best solution to fit our goal, different configuration of AXI4 and SHE accelerator were explored, then software was developed. The software is arranged in three layers; the lower one reproduces the interface provided by the SHE specifications and satisfies the related latency requirement while the other two provide functions that can help the end user to interact with SHE despite this is paid in terms of execution time. In this way the trade-off between performance and usability is left to the end user.
On one hand the software has been developed to fulfil the requirements stated by SHE specifications on the other hand to make it compatible with some features, that are execution in both bare-metal and embedded OS environment (Linux OS has been chosen in this work) and the ability to work with both polling and interrupt wait policies in each implemented version. The project space have been explored and different solutions have been implemented in order to find the best trade-off between performance and software flexibility and meet the SHE requirements. The solutions explored involve frequencies sweep of SHE and AXI4 bus, in addition to the two previously mentioned software wait policies. All the solutions were tested on a Xilinx ZYNQ 7000 SoC that features an ARM Cortex-A9 CPU, where the software has been run, and a Xilinx FPGA for hardware prototyping.
File