Tesi etd-07042023-094321 |
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Tipo di tesi
Tesi di laurea magistrale
Autore
SALAMINI, NIKO
URN
etd-07042023-094321
Titolo
Design and Implementation of Isolation Mechanisms for Zynq Ultrascale+ MPSoC
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
COMPUTER ENGINEERING
Relatori
relatore Prof. Dini, Gianluca
relatore Prof. Biondi, Alessandro
correlatore Ing. Cicero, Giorgiomaria
relatore Prof. Biondi, Alessandro
correlatore Ing. Cicero, Giorgiomaria
Parole chiave
- Arm architecture
- embedded systems
- Fpga
- isolation
- security
Data inizio appello
21/07/2023
Consultabilità
Tesi non consultabile
Riassunto
Nowadays, embedded computing systems are becoming part of our daily life.
They are used in various applications including healthcare, automotive, industrial
control systems, etc. These systems are more and more capable of offering
advanced functionalities, such as AI-based and computer vision algorithms,
connectivity, complex human-machine interfaces, etc. With the increase of such
functionalities, the overall complexity of the systems is increasing accordingly,
from both hardware and software perspectives. These aspects are now known
to be a source of vulnerability, thus making modern embedded systems more
exposed to cyber-attacks. This work proposes the design and implementation
of hardware- and software-based mechanisms that enforce isolation between
multiple software domains of varying criticality and security levels on the AMD
Zynq Ultrascale+ MPSoC. The latter is a heterogeneous hardware platform
equipped with CPUs (both real-time and application processors), peripherals,
and an FPGA fabric. The proposed architecture leverages Arm TrustZone,
virtualization technology, and other AMD proprietary hardware IPs of the SoC
(e.g., XMPU and XPPU) to support up to three different criticality levels,
namely low, medium, and high. Additionally, it provides an extra secure domain
dedicated to executing secure tasks. This comprehensive design ensures the
optimal utilization of the hardware platform and its computing resources.
They are used in various applications including healthcare, automotive, industrial
control systems, etc. These systems are more and more capable of offering
advanced functionalities, such as AI-based and computer vision algorithms,
connectivity, complex human-machine interfaces, etc. With the increase of such
functionalities, the overall complexity of the systems is increasing accordingly,
from both hardware and software perspectives. These aspects are now known
to be a source of vulnerability, thus making modern embedded systems more
exposed to cyber-attacks. This work proposes the design and implementation
of hardware- and software-based mechanisms that enforce isolation between
multiple software domains of varying criticality and security levels on the AMD
Zynq Ultrascale+ MPSoC. The latter is a heterogeneous hardware platform
equipped with CPUs (both real-time and application processors), peripherals,
and an FPGA fabric. The proposed architecture leverages Arm TrustZone,
virtualization technology, and other AMD proprietary hardware IPs of the SoC
(e.g., XMPU and XPPU) to support up to three different criticality levels,
namely low, medium, and high. Additionally, it provides an extra secure domain
dedicated to executing secure tasks. This comprehensive design ensures the
optimal utilization of the hardware platform and its computing resources.
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