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Tesi etd-04292019-225214


Thesis type
Tesi di dottorato di ricerca
Author
DIMAGGIO, ELISABETTA
URN
etd-04292019-225214
Title
High efficiency thermoelectric devices made by silicon nanostructures
Settore scientifico disciplinare
ING-INF/01
Corso di studi
INGEGNERIA DELL'INFORMAZIONE
Supervisors
tutor Prof. Pennelli, Giovanni
Parole chiave
  • thermal and electrical characterization
  • three omega method
  • thermoelectric generators
  • silicon nanostructures
  • metal assisted chemical etching
Data inizio appello
15/05/2019;
Consultabilità
Parziale
Data di rilascio
15/05/2022
Riassunto analitico
The focus of the thesis is the fabrication of high efficiency devices for thermoelectric
generation (TEGs), based on silicon nanostructures. The high efficiency of a
TEG relies on the figure of merit ZT: enhancing it means to improve the electrical
conductivity  and the Seebeck coefficient S, and to reduce the thermal conductivity
kt. Silicon nanostructures satisfy these requirements thanks to the reduced kt compared
to bulk silicon, as evidenced by several theoretical and experimental works on single
nanowires. However, to deliver high currents and high voltages to an electrical load
it is necessary to fabricate TEGs made by several nanostructures connected in parallel.
This has been investigated, and here presented, following two possible strategies:
building arrays of nanowires perpendicular to the silicon substrate (vertical strategy)
or networks of nanostructures parallel to the silicon substrate (planar strategy). Such
devices are characterized by good mechanical strength and, at the same time, they can
handle large currents and deliver high power.
In the context of the vertical strategy, a low-cost process for the fabrication of
forests of long silicon nanowires with a top copper contact was developed. Different
approaches to reduce the influence of the substrate in the electrical performances of
these nanowire forests were examined, such as applying the process on highly doped
substrates or reducing the thickness of the residual substrate using double polished
wafers. Then, an experimental set-up based on the guarded hot plate concept for the
measurement of their thermal conductivity was assembled. In the framework of the
planar strategy, we built prototypes of suspended nanomembranes through techniques
based on e-beam lithography and conventional CMOS processing. These prototypes
were characterized by means of the 3 omega technique, which is an electrical method that
allows to estimate the thermal conductivity of the structures under test. To this end, the
nanomembranes of the prototypes have been made with smooth or randomly rough surfaces,
with the purpose of exploring the influence of surface roughness in the reduction
of kt, which is directly linked to the phonon scattering on the nanostructure walls.
All the characterization procedures performed on these devices, both in the vertical
and in the planar strategy, were essential steps to justify the belief that a TEG made of
them can be definitely considered a realistic outcome.
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