• adc
• chopper
• cmos
• cryocmos
• design
• low-power
• microeletronics

From the birth of the first digital computers, Analog-to-Digital Converters (ADCs) have gained more and more importance in every fields of electronics. From very high-speed digitizers required for wireless and wired data link, to very highresolution converters for environmental sensor interfacing, ADCs with very high performances must be designed. It is possible to divide the world of the Analog-to-Digital Converters according to requirements of the target applications, basically high-speed and high-resolution. Different architectures have been developed and different parameters are used to evaluate their performances, depending on the specific fields of interest.
From the examples that will be described, it will look evident how general-purpose solutions cannot fulfil so different design spaces in an efficient way. Data acquisition systems for sensor interfacing, as requested in wireless sensor networks for environmental monitoring, must be very accurate, keeping low power and area consumptions. The ADC is one of the most pivotal blocks in the acquisition chain. Its presence is essential due to the need to process, storage or transmit the information: all operations that can be realized very efficiently only in the digital world. The design of electronics for sensor nodes powered by energy harvesters or for wearable devices can be even more challenging, due to the need to keep the power consumption as low as possible, often working with supply voltage domain of few hundreds of millivolts. Extreme environments as dilution fridges, where physical experiments on qubits for quantum computing applications, can also host classical electronics, so that specific design techniques must be employed for the design of analog-mixed electronics, including analog-to-digital converters.
In this work of thesis, a full description of the design of three different Analog-to-Digital Converters will be presented. The different target specifications will require different architectures and specific solutions that will be deeply analysed. First, a Delta-Sigma (DS) Analog-to-Digital Converter optimized for low-frequency signals has been developed.
A complete description of the high-level and transistor-level design allows a full comprehension of the complex challenges for the fulfilment of high-accuracy and high-resolution specifications, as typically required for sensor interfacing.
In particular, offset and low-frequency noise could be especially detrimental due to the bandwidth of interest of the input signals, in the range from the dc to few kilohertz. A system-level chopper stabilization technique has been fully analysed and implemented.
Thanks to this technique, it has been possible to reach an offset on the order of few microvolts and a rms noise voltage of tens of microvolts.
Looking at the high demanding of low-power and low-voltage electronics for wireless sensor networks, possibly powered by energy harvesting devices, a DS converter capable of working with supply voltage as low as 200 mV has been realized. Typical issues of low amplifier dc-gain and low-headroom for MOSFET devices are faced by means of a novel switched capacitor, inverter-based integrator. The ultra-low power and ultra-low voltage converter has been simulated, showing good performances, as summarised by the figure-of-merit of 42.4 fJ/conv with Vdd = 0:3V . To prove the effectiveness of the proposed inverter-based integrator, a simple single-order DS modulator has been designed with the 0.18 μm CMOS process. Measurements on a test chip show the functionality of the converter with supply voltage as low as 0.2 V, with very low power consumptions.
Finally, the design of an high-speed Successive Approximation Register (SAR) converter for extreme environment applications is proposed. It has been optimized for quantum computing application, more precisely for radio-frequency reflectometry interface for spin qubit readout. A new challenge in the design of classical electronics for quantum computing is the compatibility with cryogenic temperatures (4 K), in order to improve the scalability of the actual quantum computers. A ping-pong SAR converter with a maximum sampling frequency of 1 GHz and a resolution of 6 has been developed.
Additional programmability allowed the increasing of the converter resolution up to 9 bit, at the cost of some speed penalties. Novel techniques in the converter topology and in the switching algorithm scheme have been developed in order to face the changing of MOSFET behaviour at cryogenic temperatures.