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Tesi etd-04202015-222527


Thesis type
Tesi di dottorato di ricerca
Author
LONGHITANO, AURELIO NUNZIO
URN
etd-04202015-222527
Title
Design of a CMOS Integrated Circuit for Electrical Impedance Spectroscopy (EIS) Systems
Settore scientifico disciplinare
ING-INF/01
Corso di studi
INGEGNERIA "L. DA VINCI"
Commissione
tutor Prof. Bruschi, Paolo
tutor Ing. Piotto, Massimo
tutor Ing. Simmarano, Roberto
Parole chiave
  • Differential Bandgap Voltage Reference
  • On-Chip Sinusoidal Wave Generator
  • Amplifier
  • Digital to Analog Converter (DAC)
  • Switched Capacitor (SC)
  • Flicker Noise Cancellation
  • Offset Cancellation
  • Integrator Buffered CDS (IBC)
  • Correlated Double Sampling (CDS)
  • Electrical Impedance Spectroscopy (EIS)
  • Analog Front End (AFE)
  • Sensor Interface
Data inizio appello
03/05/2015;
Consultabilità
parziale
Data di rilascio
03/05/2018
Riassunto analitico
In this Ph.D. thesis an integrated circuit for Electrical Impedance Spectroscopy (EIS) systems is reported. The proposed interface circuit constitutes an Analog Front End (AFE) suitable also for other measurement techniques, such as voltammetry, and allows both two-terminal and four-terminal sensing. A stimulus generator and a readout chain are the core of the system. The stimulus generator is based on a novel architecture for switched capacitor Digital-to-Analog Converters (DACs), which is capable of producing a continuous-time output signal and allows offset cancellation and low frequency noise reduction. The readout chain consists of a fully differential instrumentation amplifier based on an original topology which embodies chopper modulation for offset and flicker noise reduction. The in-amp includes an embedded demodulator which extracts in-phase and quadrature component of the input signal. An improved version of the technique for offset cancellation and flicker noise reduction, used for the switched capacitor DAC, is applied to other essential blocks which are a bandgap voltage reference and a differential-to-single ended converter.<br>Such technique, termed Integrator Buffered CDS (IBC) because employs a first stage with correlated double sampling which is buffered by an integrator, is finally applied to develop an alternative architecture for very compact operational amplifiers.
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