• FPGA
• spacecraft
• VHDL

The current State-Of-The-Art of the high-speed serial data links for use onboard spacecraft is the SpaceWire standard, which allows communication data-rates up to 400Mb/s between two different nodes of the spacecraft. Despite SpaceWire is a well-consolidated standard; the maximum data-rate offered is not enough to fulfill the growing needs of high data-rate in modern space missions. For example, spacecraft instruments such as the Synthetic Aperture Radar (SAR) has to be able to transfer three-dimensional images to the payload data processor unit at data-rate in the order of Gbps.
SpaceFibre standard is the upcoming standard for high-speed highly reliable on-board data communications. SpaceFibre is able to operate over optical fiber and copper cable and support data rates as 2.5 Gbps, 3.125 Gbps and 6.25 Gbps per lane, up to a maximum of 20 Gbps with multilane design. It complements the capabilities of the widely used SpaceWire, providing 10 to 100 times the throughput of a SpaceWire link, and introducing the concept of Quality of Service (QoS) and Fault Detection, Isolation and Recovery (FDIR) techniques, ensuring a highly reliable communication link.
The SpaceFibre standard is still under standardization process because the network and the multilane layer are still under development. Notwithstanding the fact that not all the layers are defined, the availability of a test-equipment allowing the early adoption of the SpaceFibre technologies means to be ready for the complete adoption of the upcoming standard.
This thesis deals with the Design and the Verification of a test-equipment for the SpaceFibre standard, that provides a high-level of configuration settings in order to fulfill as much as possible the various operation cases.