ETD

Archivio digitale delle tesi discusse presso l'Università di Pisa

Tesi etd-04052022-093622


Tipo di tesi
Tesi di laurea magistrale
Autore
GUERCINI, GLAUCO
URN
etd-04052022-093622
Titolo
A CMOS digital sinusoidal waveform synthesizer with analog piecewise-linear interpolation
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Prof. Bruschi, Paolo
relatore Prof. Piotto, Massimo
relatore Ing. Gagliardi, Francesco
Parole chiave
  • CMOS
  • mixed-signal design
  • first order interpolation
  • sinusoidal waveform synthesizer
Data inizio appello
29/04/2022
Consultabilità
Non consultabile
Data di rilascio
29/04/2092
Riassunto
Nowadays several fields like telecommunication systems, sensor interfaces, space applications and many others require the generation of arbitrary waveforms. Specifically, almost all these applications require a circuit able to generate sinewaves with programmable frequency and amplitude, and characterized by a good spectral purity. In order to implement such circuits, several approaches can be found in literature, but their design can be very challenging especially for fully integrated solutions. Thanks to the huge evolution of compact digital circuits through the last decades, a well established approach to generate a sinewave is that of using a Direct Digital Synthesizer (DDS) which offers several advantages, such as the possibility of varying the synthesized frequency with a fine resolution, and the possibility of changing the shape of the generated waveform simply storing different samples into a memory unit. Anyhow, this solution has a high impact on the area consumption, due to the digital memory and it also implies high power consumption.

The purpose of this thesis work is to design a novel digital CMOS sinusoidal waveform synthesizer. The devised solution exploits the First Order Interpolation (FOI) principle allowing the generation of sinewaves with a good spectral purity without requiring a large number of samples for the sinewave reconstruction, resulting in a lower area occupation with respect to DDS-based solutions. The core of the proposed synthesizer is an analog circuit whose aim is to act as stimuli generator for a Device Under Test (DUT) in Electrical (and/or Electrochemical) Impedance Spectroscopy systems. Thanks to its analog nature, the system is suitable for fully integrated System On Chip (SOC) implementations with reduced power consumption and area occupation.
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