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Tesi etd-04012008-190557


Thesis type
Tesi di dottorato di ricerca
Author
NIZZA, NICOLO'
email address
nicolo.nizza@gmail.com
URN
etd-04012008-190557
Title
CMOS INTEGRATED CIRCUITS FOR CAPACITIVE SENSORS INTERFACING
Settore scientifico disciplinare
ING-INF/01
Corso di studi
INGEGNERIA DELL'INFORMAZIONE
Supervisors
Relatore Prof. Nannini, Andrea
Relatore Prof. Bruschi, Paolo
Parole chiave
  • analog-mixed signal IC design
  • analog CMOS design
  • MEMS interfaces design
Data inizio appello
09/06/2008;
Consultabilità
Parziale
Data di rilascio
09/06/2048
Riassunto analitico
Since large scientific and economic interests reside in micro-electromechanical systems (MEMS), this thesis has been focused mainly on the design of read-out channels for capacitive integrated sensors. In the first Chapter an introduction on micro-electromechanical systems and their applications are presented. The mechanical structure of capacitive MEMS, their different transduction interfaces and their future applications in wireless sensor network are illustrated.
In the second Chapter, an interface for a capacitive pressure sensor is described. First the details of the capacitance to voltage conversion interface are shown; then two different techniques used to correct the linearity error related to the sensor characteristic are explained. The first approach uses a non-linear analog amplifier, the second method uses an analog to digital converter with a non linear characteristic.
In the third Chapter, an interface that converts capacitance variations produced by a capacitive pressure sensor in an output pulse width modulated (PWM) signal is shown. A detailed analysis of different contributions due to non-idealities sources of the circuit is discussed; a comparison between the theoretical prediction and experimental measurements on a test chip are shown.
In the fourth Chapter, a second version of circuit presented in the third chapter is shown; the circuit have a reduced power consumption and a better immunity to disturbs. The working principle is described in details, a theoretical analysis underlines possible causes of non ideality identifying the strategies which allow to reduce the effect of these disturbances.
In the fifth Chapter, the implementation of a sigma-delta analog to digital converter (SD-ADC) using the 45 nm CMOS process and with a sampling frequency of 1 GHz is presented. The design flow of two different SD-ADC is discussed; the two converters have respectively a feedback and a feedforward architecture.
Finally in the sixth Chapter, a technique that allows to transform an operational transconductive amplifier (OTA) from class A to class-AB is presented. The advantages of the proposed method respect other techniques present in literature are shown, also some other improvements that is possible to get respect the original cell are discussed.
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