Thesis etd-03312009-170325 |
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Thesis type
Tesi di dottorato di ricerca
Author
CASULA, MICHELE
URN
etd-03312009-170325
Thesis title
Advanced VLSI microarchitectures for signal processing and on-chip communication
Academic discipline
ING-INF/05
Course of study
INGEGNERIA DELL'INFORMAZIONE
Supervisors
Relatore Prof. Saletti, Roberto
Relatore Prof. Fanucci, Luca
Relatore Prof. Fanucci, Luca
Keywords
- ASIP
- h.264
- mpeg4
- MPSoC
- network on chip
- NoC
- SoC
- system on chip
- video signal processing
Graduation session start date
25/06/2009
Availability
Withheld
Release date
25/06/2049
Summary
In actual electronic industry scenario the design of more complex systems leads engineers to explore new design paradigms both in terms of hardware and software solutions. In this thesis, the application of novel hardware paradigms are considered. In the context of image signal processing (H.264/AVC video encoding and Retinex image filtering) ASIPs emerge as optimal hardware computing solution to achieve better trade-off between performance and flexibility respect to previous ASIC, DSP solutions. Network on chip emerges as the future on-chip communication hardware for multicore System on chip.
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