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Tesi etd-03192009-105412


Thesis type
Tesi di dottorato di ricerca
Author
MOSTARDINI, LUCA
URN
etd-03192009-105412
Title
Innovative Automatic Low-Cost Test Strategies For VLSI ASIC Prototypes Verification
Settore scientifico disciplinare
ING-INF/01
Corso di studi
INGEGNERIA DELL'INFORMAZIONE
Commissione
Relatore Prof. Saletti, Roberto
Relatore Prof. Fanucci, Luca
Parole chiave
  • pattern
  • MEMS
  • ICE
  • FPGA
  • failure
  • DUT
  • DSI
  • ATE
  • SoP
Data inizio appello
25/06/2009;
Consultabilità
parziale
Data di rilascio
25/06/2049
Riassunto analitico
The objective of this work is to provide solutions to bridge the gap between the ASIC development and the final ASIC mass production test. In other words here are proposed several innovative automatic low-cost test strategies for VLSI ASIC prototypes verification that can be done directly in house without the necessity to refer to a mass-production device when it should be over dimensioned, because the ASIC is still in its development phase and a full-coverage test procedure hasn’t been developed yet.
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