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Digital archive of theses discussed at the University of Pisa

 

Thesis etd-01302021-122902


Thesis type
Tesi di laurea magistrale
Author
BERTELLI, FILIPPO
URN
etd-01302021-122902
Thesis title
SystemVerilog Verification Environment for a SpaceFibre Routing Switch
Department
INGEGNERIA DELL'INFORMAZIONE
Course of study
INGEGNERIA ELETTRONICA
Supervisors
relatore Prof. Fanucci, Luca
correlatore Nannipieri, Pietro
Keywords
  • Environment
  • Routing
  • SpaceFibre
  • Switch
  • SystemVerilog
  • Verification
Graduation session start date
19/02/2021
Availability
Withheld
Release date
19/02/2091
Summary
In the last ten years the number of space missions has seen a continuous growth and together the technology on board the satellites has also increased. In fact, the advantages that satellite communication systems can provide, such as omnipresent broadband coverage over a large area, broadband transmission capacity and navigation assistance, have resulted in satellite data traffic growing significantly.
As satellite communications traffic continues to grow, the speed of onboard satellite data also increases, so it is necessary to develop communication protocols capable of supporting more and more data.
The SpaceFibre standard, published in May 2019 by the European Cooperation for Space Standardization and promoted by the European Space Agency with contributions from major international space agencies and prime contractors, represents the standardization of an open protocol solution which allows high data-rates per lane (up to 6.25 Gbps and beyond).
The management of such a high data flow and the presence of so many onboard instruments on a satellite, makes the connection network very complex. It is, therefore, necessary to insert a SpaceFibre router inside the network, in order to have a dynamic management of the connections, reducing the number and therefore the total weight of the connections.
SpaceFibre is the successor of the SpaceWire protocol and is backwards compatible with it at packet level and allows to significantly improve the performance of the system, by managing the larger bandwidth required for data management on board of the satellites.
Furthermore, the router is able to support data traffic of both protocols, bridging them together.
Hence, it allows instruments and routers, once only compatible with the SpaceWire standard, to be integrated into a SpaceFibre network.
Since the SpaceFibre protocol has been recently released no conformance testers and verification environments are available on the market, consequently it is not possible to verify its functionality and compliance with the Network Layer requirements of the SpaceFibre standard. Moreover, it is not easy to identify any early-stage malfunction, with an increase in both the development and verification time.
In this thesis we propose a SystemVerilog verification environment which, together with an exhaustive test plan and the relative set of test cases, allows to verify the functionality of any kind of SpaceFibre router, ensuring its compliance with the Network Layer of the SpaceFibre standard.
The verification environment can be used as a software conformance tester to verify the conformity of any SpaceFibre Routing Switch.
The first part of the thesis briefly presents the SpaceFibre standard in particular referring to the Network Layer. Followed by the description of the features and characteristics that a SpaceFibre router must have to be compliant with the standard.
The Device Under Test was provided by the IngeniArs company, which has developed a SpaceFibre router which has not been fully tested yet for standard conformance. The IngeniArs router is then described, specifying its additional
features and related advantages.
The structure of the verification environment is explained, detailing the files that constitute it and the design choices that have been made. A test plan is also presented, enabling us to compare the results produced by the simulation of the tests with the expected results and the requirements of the SpaceFibre standard.
In conclusion, the SystemVerilog verification environment developed throughout this thesis is able to verify the compliance of a SpaceFibre router IP with the requirements of the standard in a simple and automated way. The system can also be used for the optimization and the design of new features of the Routing Switch without the fear of compromising the pre-existing functions, reducing the development time of the router functions.
Moreover, all the data collected through the intensive execution of the implemented tests are finally summarized in a report, where all the bugs found in the implementation of the IngeniArs router are shown. Furthermore, the code coverage and functional coverage analysis obtained at the end of the simulations are discussed.
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