ETD

Archivio digitale delle tesi discusse presso l'Università di Pisa

Tesi etd-01272019-143241


Tipo di tesi
Tesi di laurea magistrale
Autore
BORRI, GIANMARCO
URN
etd-01272019-143241
Titolo
Design of a high-speed serial link for low-cost EGSE applications.
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Prof. Fanucci, Luca
relatore Ing. Nannipieri, Pietro
Parole chiave
  • SpFi
  • TLK2711
  • spacefibre
  • space qualified serdes
  • space fibre
  • serial transceiver
  • serial link
  • serial interface
  • serdes transceiver
  • serdes
  • high-speed link
  • multi-gigabit
  • high-speed
  • GTX
  • fpga serdes
  • fpga integrated serdes
  • compatibility
  • TLK2711-SP
Data inizio appello
22/02/2019
Consultabilità
Non consultabile
Data di rilascio
22/02/2089
Riassunto
In satellite systems, high-throughput payloads require special high-speed interfaces to transmit large amounts of data on the on-board data handling network. State-of-the-art solutions to achieve data rate above 1Gbps employs high-speed serial transceivers, known as SerDes (Serializer/Deserializer).
On Earth, testing of satellite payloads is performed by an EGSE (Electrical Ground Segment Equipment) which is equipped with its own high-speed serial interface. However, the transceiver embedded in the EGSE does not have to withstand to the harsh requirement typical of space application as it is intended to be used on ground. Considering the very high price of the space qualified devices, this study presents a low-cost solution for EGSE high-speed serial interfaces, based on commercial technologies but fully compatible with State-of-the-Art high-speed serial transceiver (such as the TLK2711-SP from Texas Instruments). The compatibility between commercial and space qualified high-speed serial transceiver is demonstrated in two steps: the simulation of the serial link using the HDL models of the transceivers with a custom testbench for the verification of the logical compatibility and the hardware setup of the serial link for the verification of the electrical compatibility.
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