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Tesi etd-02082005-152721

Tipo di tesi
Tesi di laurea specialistica
Marini, Andrea
Indirizzo email
VLSI design and FPGA-based prototyping of a buffered serial port for audio applications
Corso di studi
relatore Ing. Saponara, Sergio
relatore Prof. Terreni, Pierangelo
relatore Prof. Fanucci, Luca
Parole chiave
  • vlsi
Data inizio appello
Riassunto analitico
The present market of semiconductor is very competitive; on one
side consumers ask for always increasing performance and new
possibilities, on the other companies have to offer low prices in
order to be successful. For what concerns performance just think
of the wide range of mobile applications, such as PDAs, cellular
phones, and laptops : quality of services, duration of the battery
and computational power are always taken into account when buying
new devices. On the other side, due to the competition, costs have
to be very low; this means that both recursive and non-recursive
engineering costs have to be kept under control.

Time is another important concern: it is usually true that the
earlier a product is presented to the market, the wider share of
the market it will gain. This leads modern semiconductor companies
to look for viable ways to design improved products in a short
time. Because of the complexity of the new electronic systems,
this is not an easy task to be accomplished; even tough electronic
design automation (EDA) tools have greatly improved in the recent
years, a gap still exists between the rate foundries can produce
chips and the rate these chips can be designed.

A very common approach to deal with complexity and performance
requirements is to integrate as many functions as possible on a
single chip (System-On-Chip); this allows higher clock frequency
and lower costs. In connection to this also design reuse has
spread in a great part of semiconductor world. This means using in
your system modules that others have already designed and tested.
This allows you to skip some steps in the design flow (at least
for those modules) and saving a significant amount of time.

In this framework lies the work of my thesis, developed at the
StarCore, a company headquartered in Austin, Texas. StarCore
designs and licences Digital Signal Processors as intellectual
property; this is basically one of the companies that offer its
product to be used in other electronic systems, avoiding licensees
to spend time in designing it by themselves.

A Digital Signal Processor is a special kind of processor,
designed to execute calculus-intensive applications: encoding and
decoding of information, voice synthesis and recognition,
compression and decompression of data, Fourier Transform are just
some examples. In many systems, thanks to its programmability and
its limited cost it is the suitable solution. For example most
mobile phones employs a DSP processor to perform base band
operation on the signal.

In these kind of systems, it is important that very few cycles are
spent doing other than signal processing, such as dealing with
peripherals. In the case of an audio signal it is important that
the audio port asks for the fewer cycle it is possible. For this
reason at StarCore my activity was to design and develop an audio
port controller aiming to reduce at least the cycles asked to the
processor in case that the algorithm run is frame based.

For this purpose I designed hardware to be mapped into an FPGA,
and wrote some software for the DSP; I worked mainly with the
Development Board, used to prototype applications based on the
StarCore processor.