ETD system

Electronic theses and dissertations repository

 

Tesi etd-11212018-171144


Thesis type
Tesi di laurea magistrale
Author
BIAGINI, LORENZO
URN
etd-11212018-171144
Title
Worst-Case analysis of a DRAM Controller with FR-FCFS policy
Struttura
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
COMPUTER ENGINEERING
Commissione
relatore Prof. Stea, Giovanni
relatore Ing. Virdis, Antonio
Parole chiave
  • DMC
  • DRAM
  • FRFCFS
  • WCD
Data inizio appello
11/12/2018;
Consultabilità
parziale
Data di rilascio
11/12/2021
Riassunto analitico
Analysis of an upper bound on the delay experienced by the access requests targeting the main memory. The worst-case delay is also a starting point to build more useful tools that help with the evaluation of memory performance: the main purpose of this work is, in fact, to derive a minimum service curve for a DRAM whose controller applies a FR-FCFS policy in servicing queued requests. Starting from basic propositions and their proofs, the worst-case is evaluated algorithmically: a particular sequence of events is built that leads to the maximum delay.
File