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Electronic theses and dissertations repository

 

Tesi etd-09062013-080307


Thesis type
Tesi di laurea magistrale
Author
PETRI, ALESSANDRO
URN
etd-09062013-080307
Title
"Design and verification of a digitally controlled output stage for automotive safety applications"
Struttura
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Supervisors
tutor Serventi, Riccardo
tutor Di Piro, Luigi
relatore Saponara, Sergio
relatore Prof. Fanucci, Luca
Parole chiave
  • automotive
  • output stage
  • digital control
Data inizio appello
27/09/2013;
Consultabilità
Completa
Riassunto analitico
In these last decades the importance of electronics in automotive environment had an exponential increase.
Electronic Integrated Circuits (ICs) are now playing a primary role in the economy of vehicles, especially since special laws and strict safety requirements have been introduced.
The aim of the thesis, developed within Austramicrosystem design centre of Navacchio (PI), is the design and the verification of a digitally controlled output stage.
Output stages are the final components of many sensor-based ICS.
In fact their typical typical signal-chain starts from the sensing of a physical phenomenon, passing by its transduction in an electrical quantity, its digital conversion and processing, and ends with the drive of an actuator.
The task of an output stage is to interpret the input digital signal and consequently drive an actuator.
The target of this work was to improve the performances of the current output stage company solutions.
This target has been achieved through the development and realization of a digitally-controlled loop.
The proposed solution guarantees a performance improvement and adds the possibility to cyclically monitor the output voltage, detecting issues and reporting errors.
A control algorithm has been developed and validated through its insertion in a mathematical modeling of the system.
Then, to experimentally validate this control algorithm, an Integrated Circuit has been designed, realized and lastly measured. This thesis follows the workflow behind the realization of the Integrated Circuit and its successive measurement.
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