Thesis etd-04212020-130923 |
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Thesis type
Tesi di laurea magistrale
URN
etd-04212020-130923
Thesis title
A Bulk Synchronous Parallel pattern in FastFlow
Department
INFORMATICA
Course of study
INFORMATICA E NETWORKING
Supervisors
.
relatore Prof. Danelutto, Marco
Keywords
- fastflow
- multicore
- parallel programming
- programmazione parallela
Graduation session start date
08/05/2020
Availability
Full
Abstract (Inglese)
Abstract (Italiano)
Efficient parallel programming introduces multiple layers of complexity in the designing of parallel software. FastFlow, a C++ library developed at the University of Pisa, is a framework that helps system and application programmers in the design and coding of parallel programs, allowing them to abstract from finer details by providing easy-to-use, compositional parallel algorithmic skeletons such as farm and map.
This thesis extends FastFlow to provide support for the Bulk Synchronous Parallel model for multiprocessor architectures. The BSP model has been designed in the late 1980s to overcome the limitations of the PRAM model. BSP divides a program in a series of supersteps that contain both computation performed by a number of processing elements and communication between them. Each superstep is separated from the others by means of a global synchronization (e.g. barrier).
After providing the reader with the necessary background, this work proposes a C++ programming abstraction implementing the BSP model for shared-memory multicore machines. The model is then implemented on top of the FastFlow framework. The new BSP implementation performance is assessed and compared to similar frameworks using a set of real-world applications.
This thesis extends FastFlow to provide support for the Bulk Synchronous Parallel model for multiprocessor architectures. The BSP model has been designed in the late 1980s to overcome the limitations of the PRAM model. BSP divides a program in a series of supersteps that contain both computation performed by a number of processing elements and communication between them. Each superstep is separated from the others by means of a global synchronization (e.g. barrier).
After providing the reader with the necessary background, this work proposes a C++ programming abstraction implementing the BSP model for shared-memory multicore machines. The model is then implemented on top of the FastFlow framework. The new BSP implementation performance is assessed and compared to similar frameworks using a set of real-world applications.
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