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Tesi etd-03252010-205344


Thesis type
Tesi di laurea specialistica
Author
FESTA, DARIO
URN
etd-03252010-205344
Title
Design of a 5-bit ADC 4Gs/s in 90-nm CMOS
Struttura
INGEGNERIA
Corso di studi
INGEGNERIA ELETTRONICA
Commissione
relatore Prof. Saletti, Roberto
relatore Prof. Zito, Domenico
Parole chiave
  • ADC
  • Analog to digital Converter
  • CMOS
  • GS/s
Data inizio appello
30/04/2010;
Consultabilità
parziale
Data di rilascio
30/04/2050
Riassunto analitico
A 5-b A/D converter (ADC) that converts at 2 GHz is reported. Using a wideband track-and-hold, a 5-b flash ADC achieves better than 4.4 effective bits for input frequencies up to 1.7 GHz at 4 Gsample/s, and 4.9 effective bits for 62.50-MHz input at 4 Gsample/s. Peak INL and DNL are less than 0.31 LSB and 0.4 LSB, respectively. This ADC consumes about 45 mW from 1.2 V at 4 Gsample/s. <br>The A/D converter has been designed in 90nm CMOS technology.<br>
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