ETD

Archivio digitale delle tesi discusse presso l'Università di Pisa

Tesi etd-11272006-005343


Tipo di tesi
Tesi di laurea specialistica
Autore
Piccolo, Giulia
URN
etd-11272006-005343
Titolo
Evaluation noise in JFETs fabricated with the DIMES03 bipolar process
Dipartimento
INGEGNERIA
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
Relatore Macucci, Massimo
Relatore Basso, Giovanni
Relatore Nanver, Lis K.
Parole chiave
  • JFET
  • flicker
  • correlation
  • LPCVD ultra-shallow high doped gate
  • noise
Data inizio appello
12/12/2006
Consultabilità
Non consultabile
Data di rilascio
12/12/2046
Riassunto
Low noise devices are required whenever dealing with low signal power detection.
The junction field effect transistor is probably the simplest structure
that fulfills the low noise requirement, providing also a high impedance input
and good performance in a frequency range that goes from few Hz to some
MHz. Notably, JFETs are less affected by low frequency noise than MOSFETs,
and, thus, represent an appropriate option for low frequency low noise
applications.
Apart from theoretical approach to the low noise features of JFETs, there
can be process, or design, options which can enhance or reduce the onset of
excess noise. An experimental study on general purpose designed JFET
has been set up: five different process option, among whose a brand new
technique to realize ultra shallow, highly doped top gate layers, have been
investigated in search of evidences of links between either layout or process
designs and noise performance. The devices have been fully described in
their fabrication features, layout, DC performance and low frequency noise
behaviour. The geometrical factor turned out to be substantially effective
only when modulating the conductive section area of the channel along its
length. Shorter anneal have been proved to be not detrimental, since no
generation and recombination noise has been found neither in devices with long, nor in those with shorter anneal. Evidences have been found that
confirm the theories about a correlation between current flowing and 1/f
noise intensity. Shallow gate devices, in conditions of substantial identity of
other features, proved to represent neither an improvement nor a worsening in
noise performance, while ultra shallow gate devices, fabricated with the new
deposition technique, turned out to be much more noisy. A worse contact
between boron layer and metal has been assumed to play a strong role in
this phenomenon, having excluded superficial state influence. What the real
causes of this noise enhancement are has to be further investigated.
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