• FPGA prototype
• system verification

Given the increasing complexity of applications managed by today's mobile phones/PDA, there is a growing need for embedded security in the mobile baseband processors arena. Standard cryptography algorithms including SHA-x hash functions, 3-DES/AES symmetric ciphers and asymmetric cryptosystems, e.g. RSA, are usually adopted for applications such as: secure-boot, digital signatures, SSL and Digital Rights Management (DRM) support.
Hardware cryptographic accelerators are often needed to reduce the computational burden on the on-chip microprocessor(s) and must be developed as reusable intellectual properties (IPs) blocks with the aim of serving a vaste range of applications while minimizing cost and power. As for all complex IPs, special care is needed in ensuring complete HW verification and proper interaction with real-time embedded SW drivers.
The internship has focused on realizing an FPGA prototype of a cryptographic IP including several cryptographic accelerator modules with the double aim of: doing an high level verification; and providing an early platform for development of embedded SW drivers.
It has consisted in the following steps: VHDL-RTL FPGA design description; Simulation of the design with Modelsim; Porting onto a prototyping platform based on an ARM9 + Xilinx VirtexII FPGA; Application oriented verification via the ARM9 in C code.