ETD

Archivio digitale delle tesi discusse presso l'Università di Pisa

Tesi etd-09012014-224107


Tipo di tesi
Tesi di laurea magistrale
Autore
SANTANGELO, LUCA
URN
etd-09012014-224107
Titolo
Viv2XDL: a bridge between Vivado and XDL based software
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA INFORMATICA
Relatori
relatore Prof. Bernardeschi, Cinzia
relatore Prof. Domenici, Andrea
Parole chiave
  • TCL
  • Virtex
  • Artix
  • Kintex
  • 7th Series
  • Xilinx
  • Vivado
  • XDL
Data inizio appello
02/10/2014
Consultabilità
Completa
Riassunto
Xilinx is one of the best known FPGA vendors and its FPGAs are used in research, industrial and military environments. For the ISE design suite Xilinx has provided a powerful tool to extract information of the FPGA structure (up to 7th series devices) and to read and modify designs through the Xilinx Design Language (XDL). For the new Xilinx IDE Vivado however, XDL became unsupported and the tool was removed from the IDE. Instead, Vivado offers a TCL based API to get access to the information of the internal FPGA architecture as well as to modify designs. In this work a TCL script has been developed to build a bridge from Vivado to XDL based software, like RapidSmith and DHHarMa, through the creation of a compatible XDL files.
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