ETD

Archivio digitale delle tesi discusse presso l'Università di Pisa

Tesi etd-05202016-091529


Tipo di tesi
Tesi di laurea magistrale
Autore
DELLO STERPAIO, LUCA
Indirizzo email
luca.dellosterpaio@engineer.com,lucads.ingunipi@gmail.com
URN
etd-05202016-091529
Titolo
Design and Implementation of a Testing Equipment for Space High Speed Serial Links on National Instruments FPGA Platform and LabView Environment
Dipartimento
INGEGNERIA DELL'INFORMAZIONE
Corso di studi
INGEGNERIA ELETTRONICA
Relatori
relatore Prof. Fanucci, Luca
relatore Dott. Davalle, Daniele
Parole chiave
  • Serial
  • Link Analyzer
  • LabVIEW
  • High Speed
  • FPGA
  • EGSE
  • Communication
  • Space
Data inizio appello
20/06/2016
Consultabilità
Non consultabile
Data di rilascio
20/06/2086
Riassunto
The thesis deals with Design and Implementation of a Testing Equipment for Space High Speed Serial Links on National Instruments FPGA Platform and LabVIEW Environment.
SpaceWire is the current generation rated up to 400 Mbps of spacecraft on‑board high‑speed serial communications.
Major subjects of the Space Industry prefer resort to comprehensive, structured and reliable testing environment, like the well renown LabVIEW solution.
Currently, there are no proper or complete solutions available on the testing‑equipment market able to offer for SpaceWire links both top‑rated speed and advanced Link Analyser functionalities under the LabVIEW environment.
Willing to address this growing market request, National Instruments would offer a completed and natively LabVIEW integrated solution for SpaceWire testing purposes based on its PXIe hardware.
The thesis discussed in these pages is the result of National Instruments and University of Pisa joint collaboration.
The presented document first provides context and background theory on the spacecraft design, introducing the SpaceWire standard.
Following, the required specifications are presented and translated into the SpaceWire Link Analyser system architecture to be implemented.
Main body of text explains in details all the stages involving design and implementation of the system on National Instruments target PXIe FPGA hardware solution. Know‑how acquisition about the implementation of user custom designs on National Instruments LabVIEW FPGA solutions involved the major efforts and training during thesis activities.
Lastly, the verification and validation strategy adopted is presented and discussed providing the achieved results.
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